Question

The output of NAND gate is LOW when
A. All input are high
B. all inputs are low
C. only one input is high
D. only one input is low

Answer 1

Hint:The utility of transistors as fast switches determines their use in the design of logic gates. The collector voltage with respect to the emitter can be near zero when the base-emitter diode is switched on sufficiently to be powered into saturation, and can be used to create gates for the TTL logic family.

Complete answer:
A NAND gate (NOT-AND) is a logic gate in digital electronics that produces a false output only if all of its inputs are true; thus, its output complements that of an AND gate. Only if all of the gate's inputs are HIGH (1) we get a LOW (0) output result; if any input is LOW (0), a HIGH (1) output occurs.

Transistors and junction diodes are used to create a NAND gate. A two-input NAND gate's rationale can be expressed as \[\overline {{\rm{AB}}} = \overline {\rm{A}} + \overline {\rm{B}} \] using De Morgan's rules, rendering a NAND gate analogous to inverters followed by an OR gate.

Since any boolean function can be implemented using a combination of NAND gates, the NAND gate is essential. This is referred to as practical completeness. This is a property that it shares with the NOR gate. The logical completeness of NAND is used in digital systems that use such logic circuits.

NAND gates with two or more inputs can be used in transistor-transistor logic, CMOS, and other logic families as integrated circuits. The function \[NOT\left( {{a_1}\;AND\;{a_2}\;AND{\rm{ }}...{\rm{ }}AND\;{a_n}} \right).\] is logically equivalent to \[NOT\left( {{a_1}\;AND\;{a_2}\;AND{\rm{ }}...{\rm{ }}AND\;{a_n}} \right).\]

Note:A boolean expression is a logical argument that produces a boolean value, either True or False. In addition, digital circuits for True and False use the numbers $1$ and $0$.Statements that use logical operators, such as AND, OR, XOR, and NOT, are known as Boolean expressions.