
If a, b, c and d are inputs to a gate and x is its output, the, as per the following time graph, the gate is:
A) NOT
B) AND
C) OR
D) NAND

Answer
513.9k+ views
Hint: The given digital pulses of inputs as well as the output are decoded into their respective binary numbers. The digital pulse involving a raised horizontal line corresponds to binary number 1 whereas the digital pulse involving a horizontal line at the base corresponds to binary number 0. A truth table for the given gate is generated and matched with the truth tables of gates given in options, to determine the correct answer.
Complete answer:
Given that a, b, c are inputs to a gate and x is the output of the gate. From the diagram above, it is clear that both inputs as well as the output of the given gate are represented using digital pulses. A digital pulse involving a raised horizontal line corresponds to binary number 1 whereas a digital pulse involving a horizontal line at the base corresponds to binary number 0. Decoding the given digital pulses in the given diagram, we have
From the truth table, we can easily understand that output (x) is 0 when all the inputs (a, b, c and d) are 0 whereas the output is 1, when at least one of the inputs is 1.
This inference helps us to conclude that the gate used in our problem is nothing but an OR gate, which has a truth table as given below:
Here, A and B are inputs to an OR gate and O is the output of corresponding inputs. Clearly, output of an OR gate (O) is 0 if all the inputs (A and B) are 0 whereas the output is 1 when at least one of the inputs is 1.
So, the correct answer is “Option C”.
Note:
For an AND gate, output is 1 if all the inputs are 1 whereas the output is 0 if at least one of the inputs is 0. For a NOT gate, output is 1 if the input is 0 and vice versa. For a NAND gate, the output is 0 if all the inputs are 1 whereas the output is 1 in all the other cases. A NAND gate is equivalent to a NOT AND gate.
Complete answer:

Given that a, b, c are inputs to a gate and x is the output of the gate. From the diagram above, it is clear that both inputs as well as the output of the given gate are represented using digital pulses. A digital pulse involving a raised horizontal line corresponds to binary number 1 whereas a digital pulse involving a horizontal line at the base corresponds to binary number 0. Decoding the given digital pulses in the given diagram, we have
a | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
b | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
c | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 |
d | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
x | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
From the truth table, we can easily understand that output (x) is 0 when all the inputs (a, b, c and d) are 0 whereas the output is 1, when at least one of the inputs is 1.
This inference helps us to conclude that the gate used in our problem is nothing but an OR gate, which has a truth table as given below:
A | B | O |
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 1 |
Here, A and B are inputs to an OR gate and O is the output of corresponding inputs. Clearly, output of an OR gate (O) is 0 if all the inputs (A and B) are 0 whereas the output is 1 when at least one of the inputs is 1.
So, the correct answer is “Option C”.
Note:
For an AND gate, output is 1 if all the inputs are 1 whereas the output is 0 if at least one of the inputs is 0. For a NOT gate, output is 1 if the input is 0 and vice versa. For a NAND gate, the output is 0 if all the inputs are 1 whereas the output is 1 in all the other cases. A NAND gate is equivalent to a NOT AND gate.
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